1. Technical Field
The present invention relates to a method for manufacturing a semiconductor device comprising a layer of cobalt silicide.
2. Related Art
Among conventional methods for manufacturing semiconductor devices, a method for manufacturing a semiconductor device having a layer of titanium silicide formed on a silicon substrate is typically described in Japanese Patent Laid-Open No. H10-256,191 (1998). Resistances in electrodes such as a gate or source/drain can be reduced by providing the titanium silicide layer, like the above-described configuration. In recent years, a layer of cobalt silicide is employed, in place of a layer of titanium silicide, according to requirements for achieving faster operation of a device. Such cobalt silicide layer may be formed within a furnace annealing apparatus or a lamp annealing apparatus.
Among conventional technologies for forming a cobalt silicide layer, a process is typically described in Japanese Patent Laid-Open No. 2000-243,726. In the process described in Japanese Patent Laid-Open No. 2000-243,726, a cobalt film is first sputter deposited at a temperature of around 200 degree C. Thereafter, the cobalt film is heated within another sputter chamber at a temperature within a range of from 300 degree C. to 400 degree C. for two minutes or longer, without exposing the film to atmospheric air. It is described in the above-described disclosure that this procedure helps accelerating a nuclear growth of a dicobalt monosilicide (Co2Si) film, thereby promoting a crystallization thereof. It is also described in the above-described disclosure that a transistor manufactured via this process exhibits a reduced layer resistance in a p-type electrode of the transistor, as compared with a case of conducting a high-temperature sputter process at a temperature of around 450 degree C.